bag3_digital.layout.serdes.serNto1_fast

Module Contents

Classes

SerNto1Fast

The base template class.
class bag3_digital.layout.serdes.serNto1_fast.SerNto1Fast(temp_db: bag.layout.template.TemplateDB, params: bag.util.immutable.Param, **kwargs: Any)[source]

Bases: xbase.layout.mos.base.MOSBase

The base template class.

Parameters:

  • temp_db (TemplateDB) – the template database.

  • params (Param) – the parameter values.

  • log_file (str) – the log file path.

  • log_level (LogLevel) – the logging level.

  • **kwargs (Any) –

    dictionary of the following optional parameters:

    gridRoutingGrid

    the routing grid to use for this template.

classmethod get_schematic_class() → Optional[Type[bag.design.module.Module]][source]
classmethod get_params_info() → Mapping[str, str][source]

Returns a dictionary from parameter names to descriptions.

Returns:

param_info – dictionary from parameter names to descriptions.

Return type:

Mapping[str, str]

classmethod get_default_param_values() → Mapping[str, Any][source]

Returns a dictionary containing default parameter values.

Override this method to define default parameter values. As good practice, you should avoid defining default values for technology-dependent parameters (such as channel length, transistor width, etc.), but only define default values for technology-independent parameters (such as number of tracks).

Returns:

default_params – dictionary of default parameter values.

Return type:

Mapping[str, Any]

draw_layout() → None[source]

Draw the layout of this template.

Override this method to create the layout.

WARNING: you should never call this method yourself.

connect_supplies(vdd_hm: bag.layout.routing.base.WireArray, vss_hm: bag.layout.routing.base.WireArray, sup_coords: Sequence[int], xh: int, yh: int) → Tuple[Mapping[int, Union[bag.layout.routing.base.WireArray, Sequence[bag.layout.routing.base.WireArray]]], Mapping[int, Union[bag.layout.routing.base.WireArray, Sequence[bag.layout.routing.base.WireArray]]]][source]
connect_up(warr_vm_list: Sequence[bag.layout.routing.base.WireArray], warr_xm: bag.layout.routing.base.WireArray, xxm_tidx: bag.util.math.HalfInt, sig_type: str, mlm_mode: pybag.enum.MinLenMode) → Mapping[int, Union[bag.layout.routing.base.WireArray, Sequence[bag.layout.routing.base.WireArray]]][source]