bag3_analog.layout.res.ladder

Module Contents

Classes

ResLadder

An array of resistors to be used as a resistor ladder, e.g. for RDAC.

class bag3_analog.layout.res.ladder.ResLadder(temp_db: bag.layout.template.TemplateDB, params: bag.util.immutable.Param, **kwargs: Any)

Bases: xbase.layout.res.base.ResArrayBase

An array of resistors to be used as a resistor ladder, e.g. for RDAC. Resistors are stringed together in a Z-pattern, starting from the top left.

Assumption - Top layer is an even layer - Resistors are sized tall enough to fit enough top layer wires

property core_coord0: int

classmethod get_schematic_class() → Optional[Type[bag.design.module.Module]]

classmethod get_params_info() → Dict[str, str]

Returns a dictionary from parameter names to descriptions.

Returns:

param_info – dictionary from parameter names to descriptions.

Return type:

Mapping[str, str]

classmethod get_default_param_values() → Dict[str, Any]

Returns a dictionary containing default parameter values.

Override this method to define default parameter values. As good practice, you should avoid defining default values for technology-dependent parameters (such as channel length, transistor width, etc.), but only define default values for technology-independent parameters (such as number of tracks).

Returns:

default_params – dictionary of default parameter values.

Return type:

Mapping[str, Any]

draw_layout() → None

General strategy to achieve good wire matching: 1) Draw the metal setup for one unit cell 2) Replicate / translate that unit metal setup to all units 3) Connect the ladder array 4) Connect the dummies to supply bars 5) Connect substrate connections and complete connections up to vm_layer 6) Draw xm_layer ladder tap and supply connections

_draw_unit_metal() → Dict[int, List[Union[bag.layout.routing.base.WireArray, List[bag.layout.routing.base.WireArray]]]]

Draws metal wires over a unit cell. Returns all the metal wire arrays

_array_metal_and_connect(unit_metal_dict: Dict[int, List[Union[bag.layout.routing.base.WireArray, List[bag.layout.routing.base.WireArray]]]]) → Dict[Tuple[int, int], Dict[int, List[Union[bag.layout.routing.base.WireArray, List[bag.layout.routing.base.WireArray]]]]]

Takes the unit metal dictionary and arrays it over the whole array. Also connects to the PLUS and MINUS terminals. Returns a dictionary mapping (xidx, yidx) to unit metal dictionaries for each unit cell. Actual connecting up of these wires happens in separate functions.

_connect_ladder(full_metal_dict: Dict[Tuple[int, int], Dict[int, List[Union[bag.layout.routing.base.WireArray, List[bag.layout.routing.base.WireArray]]]]])

Connects up the internal ladder

_connect_dummies(full_metal_dict: Dict[Tuple[int, int], Dict[int, List[Union[bag.layout.routing.base.WireArray, List[bag.layout.routing.base.WireArray]]]]])

Connects up PLUS and MINUS pins of the dummies

_connect_supplies_and_substrate(full_metal_dict: Dict[Tuple[int, int], Dict[int, List[Union[bag.layout.routing.base.WireArray, List[bag.layout.routing.base.WireArray]]]]])

Draw substrate connections and supply wires

_connect_top(full_metal_dict: Dict[Tuple[int, int], Dict[int, List[Union[bag.layout.routing.base.WireArray, List[bag.layout.routing.base.WireArray]]]]]) → Tuple[int, int, int]

Draw ladder taps connections. Resistors the width, length, layer of the metal resistor