`xbase.layout.mos.data`

Module Contents

Classes

`MOSRowSpecs`	specification for a transistor row. Includes unit transistor dimensions and wire info
`RowExtInfo`	Information about top or bottom boundary of a transistor block.
`BlkExtInfo`	Information about top or bottom boundary of a transistor row
`MOSEdgeInfo`	Information about left or right boundary of a transistor row.
`MOSRowInfo`	Information about a transistor row.
`MOSPorts`
`NAND2Ports`
`RowPlaceInfo`	Information about a transistor row, placement data included.
`MOSBaseEndInfo`
`MOSLayInfo`	The transistor block layout information object.
`ExtEndLayInfo`	The extension block layout information object.
`MOSAbutInfo`
`ExtWidthInfo`

class xbase.layout.mos.data.MOSRowSpecs(mos_type: xbase.layout.enum.MOSType, width: int, threshold: str, bot_wires: xbase.layout.wires.WireData, top_wires: xbase.layout.wires.WireData, mid_wires: Optional[xbase.layout.wires.WireData] = None, options: Optional[Mapping[str, Any]] = None, flip: bool = False, sub_width: int = 0, double_gate: bool = False)[source]

specification for a transistor row. Includes unit transistor dimensions and wire info for determining track locations on conn_layer + 1

property ignore_bot_vm_sp_le: bool[source]

property ignore_top_vm_sp_le: bool[source]

mos_type: xbase.layout.enum.MOSType[source]

width: int[source]

threshold: str[source]

bot_wires: xbase.layout.wires.WireData[source]

mid_wires: xbase.layout.wires.WireData[source]

top_wires: xbase.layout.wires.WireData[source]

options: bag.util.immutable.ImmutableSortedDict[str, Any][source]

flip: bool[source]

sub_width: int[source]

double_gate: bool[source]

classmethod make_row_specs(val: Mapping[str, Any]) → MOSRowSpecs[source]

class xbase.layout.mos.data.RowExtInfo[source]

Information about top or bottom boundary of a transistor block.

This class contains information needed to draw an extension region adjacent to the transistor row.

row_type: xbase.layout.enum.MOSType[source]

threshold: str[source]

info: bag.util.immutable.ImmutableSortedDict[str, Any][source]

classmethod from_dict(table: Mapping[str, Any]) → RowExtInfo[source]

__getitem__(item: str) → Any[source]

get(item: str, def_val: Optional[Any] = None) → Any[source]

copy_with(row_type: Optional[xbase.layout.enum.MOSType] = None, threshold: Optional[str] = None, **kwargs) → RowExtInfo[source]

to_dict() → Mapping[str, Any][source]

class xbase.layout.mos.data.BlkExtInfo[source]

Information about top or bottom boundary of a transistor row

property fg: int[source]

row_type: xbase.layout.enum.MOSType[source]

threshold: str[source]

guard_ring: bool[source]

fg_dev: bag.util.immutable.ImmutableList[Tuple[int, xbase.layout.enum.MOSType]][source]

info: bag.util.immutable.ImmutableSortedDict[str, Any][source]

__getitem__(item: str) → Any[source]

__contains__(item: str) → bool[source]

get(item: str, def_val: Optional[Any] = None) → Any[source]

class xbase.layout.mos.data.MOSEdgeInfo(**kwargs: Any)[source]

Information about left or right boundary of a transistor row.

info: bag.util.immutable.ImmutableSortedDict[str, Any][source]

__bool__() → bool[source]

get(item: str, def_val: Optional[Any] = None) → Any[source]

__getitem__(item: str) → Any[source]

copy_with(**kwargs) → MOSEdgeInfo[source]

class xbase.layout.mos.data.MOSRowInfo[source]

Information about a transistor row.

property bot_conn_types: Sequence[xbase.layout.enum.MOSWireType][source]

Return sequence of bottom wire connection types.

index 0 is the default type.

property top_conn_types: Sequence[xbase.layout.enum.MOSWireType][source]

Return sequence of top wire connection types.

index 0 is the default type.

property mid_conn_types: Sequence[xbase.layout.enum.MOSWireType][source]

Return sequence of top wire connection types.

index 0 is the default type.

lch: int[source]

width: int[source]

sub_width: int[source]

row_type: xbase.layout.enum.MOSType[source]

threshold: str[source]

height: int[source]

flip: bool[source]

top_ext_info: RowExtInfo[source]

bot_ext_info: RowExtInfo[source]

info: bag.util.immutable.ImmutableSortedDict[str, Any][source]

g_conn_y: Tuple[int, int] = (0, 0)[source]

g_m_conn_y: Tuple[int, int] = (0, 0)[source]

ds_conn_y: Tuple[int, int] = (0, 0)[source]

ds_m_conn_y: Tuple[int, int] = (0, 0)[source]

ds_g_conn_y: Tuple[int, int] = (0, 0)[source]

sub_conn_y: Tuple[int, int] = (0, 0)[source]

guard_ring: bool = False[source]

guard_ring_col: bool = False[source]

double_gate: bool = False[source]

g2_conn_y: Tuple[int, int] = (0, 0)[source]

g2_m_conn_y: Tuple[int, int] = (0, 0)[source]

classmethod from_dict(table: Mapping[str, Any]) → MOSRowInfo[source]

get_ext_info(top_edge: bool) → RowExtInfo[source]

get_conn_y(wtype: xbase.layout.enum.MOSWireType) → Tuple[int, int][source]

get_all_conn_y(wtype: xbase.layout.enum.MOSWireType) → Sequence[Tuple[int, int]][source]: get list of all possible Y coordinates the given wire type could connect to

__getitem__(name: str) → Any[source]

to_dict() → Mapping[str, Any][source]

class xbase.layout.mos.data.MOSPorts[source]

property num_s: int[source]

property num_d: int[source]

property num_g: int[source]

property g0: bag.layout.routing.base.WireArray[source]

property g1: bag.layout.routing.base.WireArray[source]

g: bag.layout.routing.base.WireArray[source]

d: bag.layout.routing.base.WireArray[source]

s: bag.layout.routing.base.WireArray[source]

shorted_ports: bag.util.immutable.ImmutableList[xbase.layout.enum.MOSPortType][source]

m: Optional[bag.layout.routing.base.WireArray][source]

g2: Optional[bag.layout.routing.base.WireArray][source]

__getitem__(item: xbase.layout.enum.MOSPortType) → bag.layout.routing.base.WireArray[source]

class xbase.layout.mos.data.NAND2Ports[source]

g0: Sequence[bag.layout.routing.base.WireArray][source]

g1: Sequence[bag.layout.routing.base.WireArray][source]

d: bag.layout.routing.base.WireArray[source]

s: bag.layout.routing.base.WireArray[source]

m: Optional[bag.layout.routing.base.WireArray][source]

class xbase.layout.mos.data.RowPlaceInfo[source]

Information about a transistor row, placement data included. (yb_blk, yt_blk) describe the y dimensions of the block, i.e. the MOS row. (yb, yt) describe the y dimensions of the block plus any edge extensions.

row_info: MOSRowInfo[source]

bot_wires: xbase.layout.wires.WireLookup[source]

top_wires: xbase.layout.wires.WireLookup[source]

yb: int[source]

yt: int[source]

yb_blk: int[source]

yt_blk: int[source]

y_conn: Tuple[int, int][source]

mid_wires: Optional[xbase.layout.wires.WireLookup][source]

classmethod from_dict(table: Mapping[str, Any]) → RowPlaceInfo[source]

to_dict() → Mapping[str, Any][source]

get_extend(tr_pitch, delta: int, top_edge: bool, shared: Sequence[str]) → RowPlaceInfo[source]: Returns a copy of self, with either the top or bottom edge of the bound box extended delta in the y direction. Uses tr_pitch to quantize delta for shifting the tracks. shared lists tracks shared with block abut on the extending edge. When top_edge==True, the top edge is shifted by delta and the top tracks are shifted. When top_edge==False, the top edge is shifted by delta, the active area is shifted by delta,

and the tracks are shifted by delta. This maintains alignment with y=0.

get_move(tr_pitch: int, delta: int) → RowPlaceInfo[source]: Returns a copy of self, shifted delta in the y direction. Uses tr_pitch to quantize delta for shifting the tracks.

get_ext_margin(top_edge: bool) → int[source]

get_abut_info(rhs: RowPlaceInfo, top_edge: bool, rhs_top_edge: bool, shared: Sequence[str], rhs_shared: Sequence[str], tr_manager: bag.layout.routing.base.TrackManager, layer: int) → Tuple[int, RowExtInfo, RowExtInfo][source]

Returns the margin needed to abut this row with the given row.

Parameters:

rhs (RowPlaceInfo) – the other row.
top_edge (bool) – True if rhs is abutting to top edge of this row.
rhs_top_edge (bool) – True if we’re abutting to top edge of the other row.
shared (Sequence[str]) – list of edge wires shared with the other tile.
rhs_shared (Sequence[str]) – list of edge wires from the other tile shared with this tile.
tr_manager (TrackManager) – the TrackManager object
layer (int) – layer ID of the wires.

Returns:

margin (int) – the margin in resolution units.
einfo1 (RowExtInfo) – the row extension information object of this RowPlaceInfo.
einfo2 (RowExtInfo) – the row extension information object of the other RowPlaceInfo.