`xbase.layout.enum`

Module Contents

Classes

`MOSType`	Generic enumeration.
`SubPortMode`	Generic enumeration.
`MOSCutMode`	Support for flags
`MOSWireType`	These describe the placements of tracks above the conn_layer, relative to
`MOSPortType`	Generic enumeration.
`MOSAbutMode`	Generic enumeration.
`Alignment`	Generic enumeration.
`ExtendMode`	Generic enumeration.
`DeviceType`	Generic enumeration.
`CornerType`	Generic enumeration.

class xbase.layout.enum.MOSType[source]

Bases: enum.Enum

Generic enumeration.

Derive from this class to define new enumerations.

property is_substrate: bool[source]

property is_pwell: bool[source]

property sub_type: MOSType[source]

property is_n_plus: bool[source]

nch = 0[source]

ptap = 1[source]

pch = 2[source]

ntap = 3[source]

is_same_implant(other: MOSType) → bool[source]

class xbase.layout.enum.SubPortMode[source]

Bases: enum.Enum

Generic enumeration.

Derive from this class to define new enumerations.

EVEN = 0[source]

ODD = 1[source]

BOTH = 2[source]

class xbase.layout.enum.MOSCutMode[source]

Bases: enum.Flag

Support for flags

property num_cut: int[source]

BOT[source]

TOP[source]

MID[source]

BOTH[source]

class xbase.layout.enum.MOSWireType[source]

Bases: enum.IntEnum

These describe the placements of tracks above the conn_layer, relative to the conn_layer ports.

G: tracks directly over gate connection G_MATCH: tracks south of gate connection to match / reduce gate parasitics DS: tracks directly over drain / source connection DS_GATE: track over drain/source, overlapping with gate if possible DS_MATCH: tracks north of drain/source conn to match / reduce parasitics G2: for double gate transistors, tracks directly over the 2nd gate G2_MATCH: similar to G_MATCH for double gate transistors

For flipped transistors, G will be at the top, DS / G2 will be at the bottom. For not flipped transistors, G will be at the bottom, DS / G2 will be at the top.