bag3_digital.layout.stdcells.logic_unit

This module contains layout generators for logic unit, used for makings gates

Module Contents

Classes

LogicUnit

A logic unit to built NAND/NOR gates.
class bag3_digital.layout.stdcells.logic_unit.LogicUnit(temp_db: bag.layout.template.TemplateDB, params: bag.util.immutable.Param, **kwargs: Any)[source]

Bases: xbase.layout.mos.base.MOSBase

A logic unit to built NAND/NOR gates. Based on BAG2 version

classmethod get_params_info() → Mapping[str, str][source]

Returns a dictionary from parameter names to descriptions.

Returns:

param_info – dictionary from parameter names to descriptions.

Return type:

Mapping[str, str]

classmethod get_default_param_values() → Mapping[str, Any][source]

Returns a dictionary containing default parameter values.

Override this method to define default parameter values. As good practice, you should avoid defining default values for technology-dependent parameters (such as channel length, transistor width, etc.), but only define default values for technology-independent parameters (such as number of tracks).

Returns:

default_params – dictionary of default parameter values.

Return type:

Mapping[str, Any]

get_layout_basename() → str[source]

Returns the base name for this template.

Returns:

base_name – the base name of this template.

Return type:

str

draw_layout() → None[source]

Draw the layout of this template.

Override this method to create the layout.

WARNING: you should never call this method yourself.