bag.interface.lef

This module handles abstract generation

Module Contents

Classes

LEFInterface

An abstract class that defines interface for generating LEF files.
class bag.interface.lef.LEFInterface(config: Dict[str, Any])[source]

Bases: bag.interface.base.InterfaceBase, abc.ABC

An abstract class that defines interface for generating LEF files.

Parameters:

config (Dict[str, Any]) – the configuration dictionary.

property config: Dict[str, Any][source]
abstract generate_lef(impl_lib: str, impl_cell: str, verilog_path: pathlib.Path, lef_path: pathlib.Path, run_path: pathlib.Path, pwr_pins: Sequence[str], gnd_pins: Sequence[str], clk_pins: Sequence[str], analog_pins: Sequence[str], output_pins: Sequence[str], detailed_layers: Sequence[str], cover_layers: Sequence[str], cell_type: str, **kwargs: Any) → bool[source]

Generate the LEF file.

Parameters:

  • impl_lib (str) – the implementation library name.

  • impl_cell (str) – the implementation cell name.

  • verilog_path (Path) – the verilog shell file.

  • lef_path (Path) – the output file path.

  • run_path (Path) – the run directory.

  • pwr_pins (Sequence[str]) – list of power pin names.

  • gnd_pins (Sequence[str]) – list of ground pin names.

  • clk_pins (Sequence[str]) – list of clock pin names.

  • analog_pins (Sequence[str]) – list of analog pin names.

  • output_pins (Sequence[str]) – list of output pin names.

  • detailed_layers (Sequence[str]) – list of detailed layer names.

  • cover_layers (Sequence[str]) – list of cover layer names.

  • cell_type (str) – the cell type.

  • **kwargs (Any) – Tool-specific configuration parameters.

Returns:

success – True if LEF generation succeeded.

Return type:

bool