bag.interface.database

This module defines DbAccess, the base class for CAD database manipulation.

Module Contents

Classes

DbAccess

A class that manipulates the CAD database.

Functions

dict_to_item_list(→ List[List[str]])	Given a Python dictionary, convert to sorted item list.
format_inst_map(→ List[List[Any]])	Given instance map from DesignModule, format it for database changes.
handle_reply(reply)	Process the given reply.

bag.interface.database.dict_to_item_list(table: Dict[str, Any]) → List[List[str]]

Given a Python dictionary, convert to sorted item list.

Parameters:

table – a Python dictionary where the keys are strings.

Returns:

the sorted item list representation of the given dictionary.

Return type:

assoc_list

bag.interface.database.format_inst_map(inst_map: Dict[str, Any]) → List[List[Any]]

Given instance map from DesignModule, format it for database changes.

Parameters:

inst_map – the instance map created by DesignModule.

Returns:

the database change instance map.

Return type:

ans

bag.interface.database.handle_reply(reply)

Process the given reply.

exception bag.interface.database.VirtuosoException(*args, **kwargs)

Bases: Exception

Exception raised when Virtuoso returns an error.

class bag.interface.database.DbAccess(dealer: bag.interface.zmqwrapper.ZMQDealer, tmp_dir: str, db_config: Dict[str, Any], lib_defs_file: str)

Bases: bag.interface.base.InterfaceBase, abc.ABC

A class that manipulates the CAD database.

Parameters:

• dealer (Optional[ZMQDealer]) – an optional socket that can be used to communicate with the CAD database.

• tmp_dir (str) – temporary file directory for DbAccess.

• db_config (Dict[str, Any]) – the database configuration dictionary.

• lib_defs_file (str) – name of the file that contains generator library names.

property default_lib_path: str

The default directory to create new libraries in.

Type:

str

property has_bag_server: bool

True if the BAG server is up.

Type:

bool

classmethod get_default_lib_path(db_config: Dict[str, Any]) → str

abstract get_exit_object() → Any

Returns an object to send to the server to shut it down.

Return None if this option is not supported.

abstract get_cells_in_library(lib_name: str) → List[str]

Get a list of cells in the given library.

Returns an empty list if the given library does not exist.

Parameters:

lib_name (str) – the library name.

Returns:

cell_list – a list of cells in the library

Return type:

List[str]

abstract create_library(lib_name: str, lib_path: str = '') → None

Create a new library if one does not exist yet.

Parameters:

• lib_name (str) – the library name.

• lib_path (str) – directory to create the library in. If Empty, use default location.

abstract configure_testbench(tb_lib: str, tb_cell: str) → Tuple[str, List[str], Dict[str, str], Dict[str, str]]

Update testbench state for the given testbench.

This method fill in process-specific information for the given testbench.

Parameters:

• tb_lib (str) – testbench library name.

• tb_cell (str) – testbench cell name.

Returns:

• cur_env (str) – the current simulation environment.

• envs (List[str]) – a list of available simulation environments.

• parameters (Dict[str, str]) – a list of testbench parameter values, represented as string.

• outputs (Dict[str, str]) – a dictionary of output expressions

abstract get_testbench_info(tb_lib: str, tb_cell: str) → Tuple[List[str], List[str], Dict[str, str], Dict[str, str]]

Returns information about an existing testbench.

Parameters:

• tb_lib (str) – testbench library.

• tb_cell (str) – testbench cell.

Returns:

• cur_envs (List[str]) – the current simulation environments.

• envs (List[str]) – a list of available simulation environments.

• parameters (Dict[str, str]) – a list of testbench parameter values, represented as string.

• outputs (Dict[str, str]) – a list of testbench output expressions.

abstract update_testbench(lib: str, cell: str, parameters: Dict[str, str], sim_envs: Sequence[str], config_rules: Sequence[List[str]], env_parameters: Sequence[List[Tuple[str, str]]]) → None

Update the given testbench configuration.

Parameters:

• lib (str) – testbench library.

• cell (str) – testbench cell.

• parameters (Dict[str, str]) – testbench parameters.

• sim_envs (Sequence[str]) – list of enabled simulation environments.

• config_rules (Sequence[List[str]]) – config view mapping rules, list of (lib, cell, view) rules.

• env_parameters (Sequence[List[Tuple[str, str]]]) – list of param/value list for each simulation environment.

abstract instantiate_layout_pcell(lib_name: str, cell_name: str, view_name: str, inst_lib: str, inst_cell: str, params: Dict[str, Any], pin_mapping: Dict[str, str]) → None

Create a layout cell with a single pcell instance.

Parameters:

• lib_name (str) – layout library name.

• cell_name (str) – layout cell name.

• view_name (str) – layout view name, default is “layout”.

• inst_lib (str) – pcell library name.

• inst_cell (str) – pcell cell name.

• params (Dict[str, Any]) – the parameter dictionary.

• pin_mapping (Dict[str, str]) – the pin mapping dictionary.

abstract create_schematics(lib_name: str, sch_view: str, sym_view: str, content_list: Sequence[Any], lib_path: str = '') → None

Create the given schematics in CAD database.

Precondition: the library already exists, all cellviews are writable (i.e. they have been closed already).

Parameters:

• lib_name (str) – name of the new library to put the concrete schematics.

• sch_view (str) – schematic view name.

• sym_view (str) – symbol view name.

• content_list (Sequence[Any]) – list of schematics to create.

• lib_path (str) – the path to create the library in. If empty, use default location.

abstract create_layouts(lib_name: str, view: str, content_list: Sequence[Any]) → None

Create the given layouts in CAD database.

Precondition: the library already exists, all cellviews are writable (i.e. they have been closed already).

Parameters:

• lib_name (str) – name of the new library to put the concrete schematics.

• view (str) – layout view name.

• content_list (Sequence[Any]) – list of layouts to create.

abstract close_all_cellviews() → None

Close all currently opened cellviews in the database.

abstract release_write_locks(lib_name: str, cell_view_list: Sequence[Tuple[str, str]]) → None

Release write locks from all the given cells.

Parameters:

• lib_name (str) – the library name.

• cell_view_list (Sequence[Tuple[str, str]]) – list of cell/view name tuples.

abstract refresh_cellviews(lib_name: str, cell_view_list: Sequence[Tuple[str, str]]) → None

Refresh the given cellviews in the database.

Parameters:

• lib_name (str) – the library name.

• cell_view_list (Sequence[Tuple[str, str]]) – list of cell/view name tuples.

abstract perform_checks_on_cell(lib_name: str, cell_name: str, view_name: str) → None

Perform checks on the given cell.

Parameters:

• lib_name (str) – the library name.

• cell_name (str) – the cell name.

• view_name (str) – the view name.

abstract create_schematic_from_netlist(netlist: str, lib_name: str, cell_name: str, sch_view: str = '', **kwargs: Any) → None

Create a schematic from a netlist.

This is mainly used to create extracted schematic from an extracted netlist.

Parameters:

• netlist (str) – the netlist file name.

• lib_name (str) – library name.

• cell_name (str) – cell_name

• sch_view (str) – schematic view name. The default value is implemendation dependent.

• **kwargs (Any) – additional implementation-dependent arguments.

abstract create_verilog_view(verilog_file: str, lib_name: str, cell_name: str, **kwargs: Any) → None

Create a verilog view for mix-signal simulation.

Parameters:

• verilog_file (str) – the verilog file name.

• lib_name (str) – library name.

• cell_name (str) – cell name.

• **kwargs (Any) – additional implementation-dependent arguments.

abstract import_sch_cellview(lib_name: str, cell_name: str, view_name: str) → None

Recursively import the given schematic and symbol cellview.

Parameters:

• lib_name (str) –

• name. (library) –

• cell_name (str) – cell name.

• view_name (str) – view name.

abstract import_design_library(lib_name: str, view_name: str) → None

Import all design templates in the given library from CAD database.

Parameters:

• lib_name (str) – name of the library.

• view_name (str) – the view name to import from the library.

abstract import_gds_file(gds_fname: str, lib_name: str, layer_map: str, obj_map: str, grid: bag.layout.routing.grid.RoutingGrid) → None

send(obj: Any) → Any

Send the given Python object to the server, and return result.

close() → None

Terminate the database server gracefully.

_eval_skill(expr: str, input_files: Optional[Dict[str, Any]] = None, out_file: Optional[str] = None) → str

Send a request to evaluate the given skill expression.

Because Virtuoso has a limit on the input/output data (< 4096 bytes), if your input is large, you need to write it to a file and have Virtuoso open the file to parse it. Similarly, if you expect a large output, you need to make Virtuoso write the result to the file, then read it yourself. The parameters input_files and out_file help you achieve this functionality.

For example, if you need to evaluate “skill_fun(arg fname)”, where arg is a file containing the list [1 2 3], and fname is the output file name, you will call this function with:

expr = “skill_fun({arg} {fname})” input_files = { “arg”: [1 2 3] } out_file = “fname”

the bag server will then a temporary file for arg and fname, write the list [1 2 3] into the file for arg, call Virtuoso, then read the output file fname and return the result.

Parameters:

• expr – the skill expression to evaluate.

• input_files – A dictionary of input files content.

• out_file – the output file name argument in expr.

Returns:

a string representation of the result.

Return type:

result

Raises:

VirtuosoException : – if virtuoso encounters errors while evaluating the expression.

get_python_template(lib_name: str, cell_name: str, primitive_table: Dict[str, str]) → str

Returns the default Python Module template for the given schematic.

Parameters:

• lib_name (str) – the library name.

• cell_name (str) – the cell name.

• primitive_table (Dict[str, str]) – a dictionary from primitive cell name to module template file name.

Returns:

template – the default Python Module template.

Return type:

str

_create_sch_templates(cell_list: List[Tuple[str, str]]) → None

instantiate_schematic(lib_name: str, content_list: Sequence[Any], lib_path: str = '', sch_view: str = 'schematic', sym_view: str = 'symbol') → None

Create the given schematics in CAD database.

Parameters:

• lib_name (str) – name of the new library to put the concrete schematics.

• content_list (Sequence[Any]) – list of schematics to create.

• lib_path (str) – the path to create the library in. If empty, use default location.

• sch_view (str) – schematic view name.

• sym_view (str) – symbol view name.

instantiate_layout(lib_name: str, content_list: Sequence[Any], lib_path: str = '', view: str = 'layout') → None

Create a batch of layouts.

Parameters:

• lib_name (str) – layout library name.

• content_list (Sequence[Any]) – list of layouts to create

• lib_path (str) – the path to create the library in. If empty, use default location.

• view (str) – layout view name.

run_drc(lib_name: str, cell_name: str, **kwargs: Any) → Tuple[bool, str]

Run DRC on the given cell.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell_name

• **kwargs – optional keyword arguments. See DbAccess class for details.

Returns:

• value (bool) – True if DRC succeeds.

• log_fname (str) – name of the DRC log file.

run_lvs(lib_name: str, cell_name: str, **kwargs: Any) → Tuple[bool, str]

Run LVS on the given cell.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell_name

• **kwargs – optional keyword arguments. See DbAccess class for details.

Returns:

• value (bool) – True if LVS succeeds

• log_fname (str) – name of the LVS log file.

run_rcx(lib_name: str, cell_name: str, params: Optional[Mapping[str, Any]] = None, **kwargs: Any) → Tuple[str, str]

run RC extraction on the given cell.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell name.

• params (Optional[Dict[str, Any]]) – optional RCX parameter values.

• **kwargs – optional keyword arguments. See DbAccess class for details.

Returns:

• netlist (str) – The RCX netlist file name. empty if RCX failed.

• log_fname (str) – RCX log file name.

import_layout(in_file: str, lib_name: str, cell_name: str, **kwargs: Any) → str

Import layout.

Parameters:

• in_file (str) – input file name.

• lib_name (str) – library name.

• cell_name (str) – cell name.

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

log_fname – log file name. Empty if task cancelled.

Return type:

str

export_layout(lib_name: str, cell_name: str, out_file: str, **kwargs: Any) → str

Export layout.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell name.

• out_file (str) – output file name.

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

log_fname – log file name. Empty if task cancelled.

Return type:

str

export_schematic(lib_name: str, cell_name: str, out_file: str, **kwargs: Any) → str

Export schematic.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell name.

• out_file (str) – output file name.

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

log_fname – log file name. Empty if task cancelled.

Return type:

str

async async_run_drc(lib_name: str, cell_name: str, **kwargs: Any) → Tuple[bool, str]

A coroutine for running DRC.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell_name

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

• value (bool) – True if DRC succeeds

• log_fname (str) – name of the DRC log file.

async async_run_lvs(lib_name: str, cell_name: str, **kwargs: Any) → Tuple[bool, str]

A coroutine for running LVS.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell_name

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

• value (bool) – True if LVS succeeds

• log_fname (str) – name of the LVS log file.

async async_run_rcx(lib_name: str, cell_name: str, **kwargs: Any) → Tuple[str, str]

A coroutine for running RCX.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell name.

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

• netlist (str) – The RCX netlist file name. empty if RCX failed.

• log_fname (str) – RCX log file name.

async async_run_lvl(gds_file: str, ref_file: str, **kwargs: Any) → Tuple[bool, str]

A coroutine for running LVL with gds files.

Parameters:

• gds_file (str) – name of the current gds to be compared.

• ref_file (str) – name of the reference gds file.

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

• value (bool) – True if LVL succeeds

• log_fname (str) – name of the LVL log file.

async async_import_layout(in_file: str, lib_name: str, cell_name: str, **kwargs: Any) → str

Import layout.

Parameters:

• in_file (str) – input file name.

• lib_name (str) – library name.

• cell_name (str) – cell name.

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

log_fname – log file name. Empty if task cancelled.

Return type:

str

async async_export_layout(lib_name: str, cell_name: str, out_file: str, **kwargs: Any) → str

Export layout.

Parameters:

• lib_name (str) – library name.

• cell_name (str) – cell name.

• out_file (str) – output file name.

• **kwargs (Any) – optional keyword arguments. See Checker class for details.

Returns:

log_fname – log file name. Empty if task cancelled.

Return type:

str

async async_export_schematic(lib_name: str, cell_name: str, out_file: str, **kwargs: Any) → str

add_sch_library(lib_name: str) → pathlib.Path

exclude_model(lib_name: str, cell_name: str) → bool

True to exclude the given schematic generator when generating behavioral models.