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# -*- coding: utf-8 -*-
from typing import Mapping, Any
import pkg_resources
from pathlib import Path
from bag.design.module import Module
from bag.design.database import ModuleDB
from bag.util.immutable import Param
from .high_pass_array import bag3_analog__high_pass_array
# noinspection PyPep8Naming
[docs]class bag3_analog__high_pass_clk(Module):
"""A HPF array with the inputs connected differentially to clocks
"""
[docs] yaml_file = pkg_resources.resource_filename(__name__,
str(Path('netlist_info',
'high_pass_clk.yaml')))
def __init__(self, database: ModuleDB, params: Param, **kwargs: Any) -> None:
Module.__init__(self, self.yaml_file, database, params, **kwargs)
@classmethod
[docs] def get_params_info(cls) -> Mapping[str, str]:
return bag3_analog__high_pass_array.get_params_info()
[docs] def design(self, narr: int, ndum: int, hp_params: Mapping) -> None:
self.instances['XHPA'].design(narr=narr, ndum=ndum, hp_params=hp_params)
sub_name = hp_params['sub_name']
suf = f'<{narr - 1}:0>'
term_list = []
for name in ('out', 'bias'):
new_name = name + suf
self.rename_pin(name + '<0>', new_name)
term_list.append((new_name, new_name))
term_list.append((sub_name, sub_name))
self.reconnect_instance('XHPA', term_net_iter=term_list)
narr_2 = narr // 2
clk_list = ['clkp,clkn' if idx % 2 else 'clkn,clkp' for idx in range(narr_2)]
clk_name = ','.join(clk_list)
self.reconnect_instance_terminal('XHPA', 'in' + suf, clk_name)
self.rename_pin('BULK', sub_name)